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ltc3642 1 3642fc typical application features applications description high effciency, high voltage 50ma synchronous step-down converter the ltc ? 3642 is a high effciency, high voltage step-down dc/dc converter with internal high side and synchronous power switches that draws only 12a typical dc sup - ply current at no load while maintaining output voltage regulation. the ltc3642 can supply up to 50ma load current and features a programmable peak current limit that provides a simple method for optimizing effciency in lower current applications. the ltc3642s combination of burst mode ? operation, integrated power switches, low quiescent cur - rent, and programmable peak current limit provides high effciency over a broad range of load currents. with its wide 4.5v to 45v input range and internal overvoltage monitor capable of protecting the part through 60v surges, the ltc3642 is a robust converter suited for regulating a wide variety of power sources. additionally, the ltc3642 includes a precise run threshold and soft - st art feature to guarantee that the power system start-up is well-controlled in any environment. the ltc3642 is available in the thermally enhanced 3mm 3mm dfn and ms8e packages. effciency and power loss vs load current n wide input voltage range: 4.5v to 45v n tolerant of 60v input transients n internal high side and low side power switches n no compensation required n 50ma output current n low dropout operation: 100% duty cycle n low quiescent current: 12a n 0.8v feedback voltage reference n adjustable peak current limit n internal and external soft-start n precise run pin threshold with adjustable hysteresis n 3.3v, 5v and adjustable output versions n only three external components required for fixed output versions n low profle (0.75mm) 3mm 3mm dfn and thermally-enhanced ms8e packages n 4ma to 20ma current loops n industrial control supplies n distributed power systems n portable instruments n battery-operated devices n automotive power systems 5v, 50ma step-down converter v in ltc3642-5 run hyst 3642 ta01a sw v in 5v to 45v 1f 10f v out 5v 50ma v out ss i set gnd 150h load current (ma) 0.1 85 efficiency (%) power loss (mw) 90 95 100 1 10 100 3642 ta01b 80 75 70 65 10 100 1 0.1 v in = 10v efficiency power loss l , lt, ltc, ltm, burst mode, linear technology, and the linear logo are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners.
ltc3642 2 3642fc absolute maximum ratings v in supply voltage ..................................... C0.3v to 60v sw voltage (dc) ........................... C0.3v to (v in + 0.3v) run voltage .............................................. C0.3v to 60v hyst, i set , ss voltages ............................... C0.3v to 6v v fb ............................................................... C0.3v to 6v v out (fixed output versions) ....................... C0.3v to 6v (note 1) 1 2 3 4 sw v in i set ss 8 7 6 5 gnd hyst v out /v fb run top view 9 gnd ms8e package 8-lead plastic msop t jmax = 125c, ja = 40c/w, jc = 5-10c/w exposed pad (pin 9) is gnd, must be soldered to pcb top view 9 gnd dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 4 3 2 1sw v in i set ss gnd hyst v out /v fb run t jmax = 125c, ja = 43c/w, jc = 3c/w exposed pad (pin 9) is gnd, must be soldered to pcb pin configuration order information operating junction temperature range (note 2) .................................................. C40c to 125c storage temperature range ................... C65c to 150c lead temperature (soldering, 10 sec) ms8e ................................................................ 300c lead free finish tape and reel part marking* package description temperature range ltc3642ems8e#pbf ltc3642ems8e#trpbf ltdth 8-lead plastic msop C40c to 125c ltc3642ems8e-3.3#pbf ltc3642ems8e-3.3#trpbf ltdyn 8-lead plastic msop C40c to 125c ltc3642ems8e-5#pbf ltc3642ems8e-5#trpbf ltdyq 8-lead plastic msop C40c to 125c ltc3642ims8e#pbf ltc3642ims8e#trpbf ltdth 8-lead plastic msop C40c to 125c ltc3642ims8e-3.3#pbf ltc3642ims8e-3.3#trpbf ltdyn 8-lead plastic msop C40c to 125c ltc3642ims8e-5#pbf ltc3642ims8e-5#trpbf ltdyq 8-lead plastic msop C40c to 125c ltc3642edd#pbf ltc3642edd#trpbf ldtj 8-lead (3mm 3mm) plastic dfn C40c to 125c ltc3642edd-3.3#pbf ltc3642edd-3.3#trpbf ldym 8-lead (3mm 3mm) plastic dfn C40c to 125c ltc3642edd-5#pbf ltc3642edd-5#trpbf ldyp 8-lead (3mm 3mm) plastic dfn C40c to 125c ltc3642idd#pbf ltc3642idd#trpbf ldtj 8-lead (3mm 3mm) plastic dfn C40c to 125c ltc3642idd-3.3#pbf ltc3642idd-3.3#trpbf ldym 8-lead (3mm 3mm) plastic dfn C40c to 125c ltc3642idd-5#pbf ltc3642idd-5#trpbf ldyp 8-lead (3mm 3mm) plastic dfn C40c to 125c consult ltc marketing for parts specifed with wider operating temperature ranges. *the temperature grade is identifed by a label on the shipping container. consult ltc marketing for information on non-standard lead based fnish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifcations, go to: http://www.linear.com/tapeandreel/
ltc3642 3 3642fc electrical characteristics the l denotes the specifcations which apply over the full operating junction temperature range, otherwise specifcations are for t a = 25c (note 2). v in = 10v, unless otherwise noted. symbol parameter conditions min typ max units input supply (v in ) v in input voltage operating range 4.5 45 v uvlo v in undervoltage lockout v in rising v in falling hysteresis l l 3.80 3.75 4.15 4.00 150 4.50 4.35 v v mv ovlo v in overvoltage lockout v in rising v in falling hysteresis 47 45 50 48 2 52 50 v v v i q dc supply current (note 3) active mode sleep mode shutdown mode v run = 0v 125 12 3 220 22 6 a a a output supply (v out /v fb ) v out output voltage trip thresholds ltc3642-3.3v, v out rising ltc3642-3.3v, v out falling l l 3.260 3.240 3.310 3.290 3.360 3.340 v v ltc3642-5v, v out rising ltc3642-5v, v out falling l l 4.940 4.910 5.015 4.985 5.090 5.060 v v v fb feedback comparator trip voltage v fb rising l 0.792 0.800 0.808 v v hyst feedback comparator hysteresis voltage l 3 5 7 mv i fb feedback pin current adjustable output version, v fb = 1v C10 0 10 na ?v linereg feedback voltage line regulation v in = 4.5v to 45v ltc3642-5, v in = 6v to 45v 0.001 %/v operation v run run pin threshold voltage run rising run falling hysteresis 1.17 1.06 1.21 1.10 110 1.25 1.14 v v mv i run run pin leakage current run = 1.3v C10 0 10 na v hystl hysteresis pin voltage low run < 1v, i hyst = 1ma 0.07 0.1 v i hyst hysteresis pin leakage current v hyst = 1.3v C10 0 10 na i ss soft-start pin pull-up current v ss < 1.5v 4.5 5.5 6.5 a t intss internal soft-start time ss pin floating 0.75 ms i peak peak current trip threshold i set floating 500k resistor from i set to gnd i set shorted to gnd l 100 20 115 55 25 130 32 ma ma ma r on power switch on-resistance top switch bottom switch i sw = C25ma i sw = 25ma 3.0 1.5 note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3642 is tested under pulsed load conditions such that t j t a . ltc3642e is guaranteed to meet specifcations from 0c to 85c junction temperature. specifcations over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc3642i is guaranteed over the full C40c to 125c operating junction temperature range. note that the maximum ambient temperature consistent with these specifcations is determined by specifc operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. the junction temperature (t j , in c) is calculated from the ambient temperature (t a , in c) and power dissipation (p d , in watts) according to the formula: t j = t a + (p d ? ja ), where ja (in c/w) is the package thermal impedance. note 3: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see applications information.
ltc3642 4 3642fc typical performance characteristics effciency vs load current line regulation load regulation feedback comparator voltage vs temperature feedback comparator hysteresis voltage vs temperature peak current trip threshold vs temperature and i set peak current trip threshold vs r iset quiescent supply current vs input voltage quiescent supply current vs temperature input voltage (v) 5 ?0.30 ?v out /v out (%) ?0.20 ?0.10 0 0.10 15 25 35 45 3642 g02 0.20 0.30 10 20 30 40 i load = 25ma figure 11 circuit load current (ma) 0 output voltage (v) 5.01 5.03 5.05 40 3642 g03 4.99 4.97 5.00 5.02 5.04 4.98 4.96 4.95 10 20 30 50 v in = 10v figure 11 circuit i set open temperature (c) ?40 4.4 feedback comparator hysteresis (mv) 4.6 4.8 5.0 5.2 5.6 ?10 20 50 80 3642 g05 110 5.4 v in = 10v temperature (c) ?40 0 peak current trip threshold (ma) 20 10 30 50 40 70 60 80 90 ?10 20 8050 3642 g06 110 130 120 110 100 i set open i set = gnd r iset = 500k v in = 10v r set (k) 0 10 peak current trip threshold (ma) 30 50 70 90 200 400 600 800 1000 3642 g07 1200 110 20 40 60 80 100 120 v in = 10v input voltage (v) 5 10 12 14 sleep 45 3642 g08 8 6 15 25 35 4 2 0 v in supply current (a) shutdown temperature (c) ?40 10 12 14 sleep 110 3642 g09 8 6 ?10 20 50 80 4 2 0 v in supply current (a) shutdown v in = 10v load current (ma) 0.1 80 efficiency (%) 90 100 1 10 100 3642 g01 70 75 85 95 65 60 figure 11 circuit i set open v out = 5v v in = 10v v in = 45v v in = 15v v in = 24v v in = 36v temperature (c) ?40 0.798 feedback comparator trip voltage (v) 0.799 0.800 0.801 ?10 20 50 80 3642 g04 110 v in = 10v t a = 25c, unless otherwise noted.
ltc3642 5 3642fc typical performance characteristics switch on-resistance vs input voltage switch on-resistance vs temperature switch leakage current vs temperature effciency vs input voltage run comparator threshold voltage vs temperature internal soft-start time vs temperature soft-start waveforms operating waveforms load step transient response input voltage (v) 0 0 switch on-resistance () 0.5 1.5 2.0 2.5 20 40 50 4.5 3642 g10 1.0 10 30 top bottom 3.0 3.5 4.0 temperature (c) ?40 switch on-resistance () 3 4 5 80 3642 g11 2 1 0 ?10 20 50 110 bottom v in = 10v top temperature (c) 0 switch leakage current (a) 0.2 0.4 0.6 0.1 0.3 0.5 ?10 20 50 80 3642 g12 110 ?40 v in = 45v sw = 0v sw = 45v temperature (c) ?40 1.00 run comparator threshold (v) 1.05 1.10 1.15 1.20 1.30 ?10 20 50 80 3642 g14 110 1.25 rising falling temperature (c) ?40 0.90 internal soft-start time (ms) 0.95 1.00 1.05 1.10 1.20 ?10 20 50 80 3642 g15 110 1.15 output voltage 1v/div 5ms/div c ss = 0.047f 3642 g16 output voltage 50mv/div switch voltage 5v/div inductor current 50ma/div 10s/div v in = 10v i set open i load = 25ma figure 11 circuit 3642 g17 output voltage 25mv/div load current 25ma/div 1ms/div v in = 10v i set open figure 11 circuit 3642 g18 input voltage (v) 10 65 efficiency (%) 70 75 80 85 90 95 15 20 25 30 35 40 3642 g13 45 figure 11 circuit i set open i load = 50ma i load = 10ma i load = 1ma t a = 25c, unless otherwise noted.
ltc3642 6 3642fc pin functions sw (pin 1): switch node connection to inductor. this pin connects to the drains of the internal power mosfet switches. v in (pin 2): main supply pin. a ceramic bypass capacitor should be tied between this pin and gnd (pin 8). i set (pin 3): peak current set input. a resistor from this pin to ground sets the peak current trip threshold. leave foating for the maximum peak current (115ma). short this pin to ground for the minimum peak current (25ma). a 1a current is sourced out of this pin. ss (pin 4): soft-start control input. a capacitor to ground at this pin sets the ramp time to full current output dur - ing start-up. a 5a current is sourced out of this pin. if left foating, the ramp time defaults to an internal 0.75ms soft-start. run (pin 5): run control input. a voltage on this pin above 1.2v enables normal operation. forcing this pin below 0.7v shuts down the ltc3642, reducing quiescent current to approximately 3a. v out /v fb (pin 6): output voltage feedback. for the fxed output versions, connect this pin to the output supply. for the adjustable version, an external resistive divider should be used to divide the output voltage down for comparison to the 0.8v reference. hyst (pin 7): run hysteresis open-drain logic output. this pin is pulled to ground when run (pin 5) is below 1.2v. this pin can be used to adjust the run pin hysteresis. see applications information. gnd (pin 8, exposed pad pin 9): ground. the exposed pad must be soldered to the printed circuit board ground plane for optimal electrical and thermal performance.
ltc3642 7 3642fc block diagram ? + 1 logic and shoot- through prevention peak current comparator sw v in ss voltage reference feedback comparator 5a 3642 bd implement divider externally for adjustable version r2 r1 c1 v out l1 reverse current comparator ? + ? + ? + + 0.800v 4 run 1.2v 5 i set 3 hyst 7 gnd 9 gnd 8 v out /v fb 6 1a 2 c2 part number ltc3642 ltc3642-3.3 ltc3642-5 r1 0 2.5m 4.2m r2 800k 800k
ltc3642 8 3642fc operation the ltc3642 is a step-down dc/dc converter with internal power switches that uses burst mode control, combining low quiescent current with high switching frequency, which results in high effciency across a wide range of load currents. burst mode operation functions by using short burst cycles to ramp the inductor current through the internal power switches, followed by a sleep cycle where the power switches are off and the load current is supplied by the output capacitor. during the sleep cycle, the ltc3642 draws only 12a of supply current. at light loads, the burst cycles are a small percentage of the total cycle time which minimizes the average supply current, greatly improving effciency. main control loop the feedback comparator monitors the voltage on the v fb pin and compares it to an internal 800mv reference. if this voltage is greater than the reference, the comparator activates a sleep mode in which the power switches and current comparators are disabled, reducing the v in pin supply current to only 12a. as the load current discharges the output capacitor, the voltage on the v fb pin decreases. when this voltage falls 5mv below the 800mv reference, the feedback comparator trips and enables burst cycles. at the beginning of the burst cycle, the internal high side power switch (p-channel mosfet) is turned on and the inductor current begins to ramp up. the inductor current increases until either the current exceeds the peak cur - rent comparator threshold or the voltage on the v fb pin exceeds 800mv, at which time the high side power switch is turned off and the low side power switch (n-channel mosfet) turns on. the inductor current ramps down until the reverse current comparator trips, signaling that the current is close to zero. if the voltage on the v fb pin is still less than the 800mv reference, the high side power switch is turned on again and another cycle commences. the average current during a burst cycle will normally be greater than the average load current. for this architecture, the maximum average output current is equal to half of the peak current. the hysteretic nature of this control architecture results in a switching frequency that is a function of the input voltage, output voltage and inductor value. this behavior provides inherent short - circuit protection. if the output is shorted to ground, the inductor current will decay very slowly during a single switching cycle. since the high side switch turns on only when the inductor current is near zero, the ltc3642 inherently switches at a lower frequency during start-up or short-circuit conditions. start-up and shutdown if the voltage on the run pin is less than 0.7v, the ltc3642 enters a shutdown mode in which all internal circuitry is disabled, reducing the dc supply current to 3a. when the voltage on the run pin exceeds 1.21v, normal operation of the main control loop is enabled. the run pin comparator has 110mv of internal hysteresis, and therefore must fall below 1.1v to disable the main control loop. the hyst pin provides an added degree of fexibility for the run pin operation. this open-drain output is pulled to ground whenever the run comparator is not tripped, signaling that the ltc3642 is not in normal operation. in applications where the run pin is used to monitor the v in voltage through an external resistive divider, the hyst pin can be used to increase the effective run comparator hysteresis. an internal 1ms soft-start function limits the ramp rate of the output voltage on start-up to prevent excessive input supply droop. if a longer ramp time and consequently less supply droop is desired, a capacitor can be placed from the ss pin to ground. the 5a current that is sourced out of this pin will create a smooth voltage ramp on the capacitor. if this ramp rate is slower than the internal 1ms soft-start, then the output voltage will be limited by the ramp rate on the ss pin instead. the internal and external soft-start functions are reset on start-up and after an undervoltage or overvoltage event on the input supply. in order to ensure a smooth start-up transition in any application, the internal soft - start also ramps the peak (refer to block diagram)
ltc3642 9 3642fc operation (refer to block diagram) inductor current from 25ma during its 1ms ramp time to the set peak current threshold. the external ramp on the ss pin does not limit the peak inductor current during start-up; however, placing a capacitor from the i set pin to ground does provide this capability. peak inductor current programming the offset of the peak current comparator nominally provides a peak inductor current of 115ma. this peak inductor current can be adjusted by placing a resistor from the i set pin to ground. the 1a current sourced out of this pin through the resistor generates a voltage that is translated into an offset in the peak current comparator, which limits the peak inductor current. input undervoltage and overvoltage lockout the ltc3642 implements a protection feature which dis - ables switching when the input voltage is not within the 4.5v to 45v operating range. if v in falls below 4v typical (4.35v maximum), an undervoltage detector disables switching. similarly, if v in rises above 50v typical (47v minimum), an overvoltage detector disables switching. when switching is disabled, the ltc3642 can safely sustain input voltages up to the absolute maximum rating of 60v. switching is enabled when the input voltage returns to the 4.5v to 45v operating range.
ltc3642 10 3642fc applications information the basic ltc3642 application circuit is shown on the front page of this data sheet. external component selection is determined by the maximum load current requirement and begins with the selection of the peak current programming resistor, r iset . the inductor value l can then be determined, followed by capacitors c in and c out . peak current resistor selection the peak current comparator has a maximum current limit of 115ma nominally, which results in a maximum average current of 55ma. for applications that demand less current, the peak current threshold can be reduced to as little as 25ma. this lower peak current allows the use of lower value, smaller components (input capacitor, output capacitor and inductor), resulting in lower input supply ripple and a smaller overall dc/dc converter. the threshold can be easily programmed with an ap - propriately chosen resistor (r iset ) between the i set pin and ground. the value of resistor for a particular peak current can be computed by using figure 1 or the follow - ing equation: r iset = i peak ? 9.09 ? 10 6 where 25ma < i peak < 115ma. the peak current is internally limited to be within the range of 25ma to 115ma. shorting the i set pin to ground programs the current limit to 25ma, and leaving it foating sets the current limit to the maximum value of 115ma. when selecting this resistor value, be aware that the figure 1. r iset selection maximum average output current for this architecture is limited to half of the peak current. therefore, be sure to select a value that sets the peak current with enough margin to provide adequate load current under all foresee - able operating conditions. inductor selection the inductor, input voltage, output voltage and peak current determine the switching frequency of the ltc3642. for a given input voltage, output voltage and peak current, the inductor value sets the switching frequency when the output is in regulation. a good frst choice for the inductor value can be determined by the following equation: l = v out f ? i peak ? ? ? ? ? ? ? 1? v out v in ? ? ? ? ? ? the variation in switching frequency with input voltage and inductance is shown in the following two fgures for typical values of v out . for lower values of i peak , multiply the frequency in figure 2 and figure 3 by 115ma/i peak . an additional constraint on the inductor value is the ltc3642s 100ns minimum on-time of the high side switch. therefore, in order to keep the current in the inductor well controlled, the inductor value must be chosen so that it is larger than l min , which can be computed as follows: l min = v in(max) ? t on(min) i peak(max) where v in(max) is the maximum input supply voltage for the application, t on(min) is 100ns, and i peak(max) is the maximum allowed peak inductor current. although the above equation provides the minimum inductor value, higher effciency is generally achieved with a larger inductor value, which produces a lower switching frequency. for a given inductor type, however, as inductance is increased dc resistance (dcr) also increases. higher dcr translates into higher copper losses and lower current rating, both of which place an upper limit on the inductance. the recommended range of inductor values for small surface mount inductors as a function of peak current is shown in figure 4. the values in this range are a good compromise between the tradeoffs discussed above. for applications maximum load current (ma) 10 r iset (k) 300 900 1000 1100 20 30 35 3642 f01 100 700 500 200 800 0 600 400 15 25 40 50 45
ltc3642 11 3642fc applications information figure 3. switching frequency for v out = 3.3v figure 2. switching frequency for v out = 5v figure 4. recommended inductor values for maximum effciency where board area is not a limiting factor, inductors with larger cores can be used, which extends the recommended range of figure 4 to larger values. inductor core selection once the value for l is known, the type of inductor must be selected. high effciency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of the more expensive ferrite cores. actual core loss is independent of core size for a fxed inductor value but is very dependent of the inductance selected. as the inductance increases, core losses decrease. un - fortunately, increased inductance requires more turns of wire and therefore copper losses will increase. ferrite designs have very low core losses and are pre - ferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. ferrite core material saturates hard, which means that inductance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor ripple current and consequently output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy but generally cost more than powdered iron core inductors with similar characteristics. the choice of which style inductor to use mainly depends on the price vs size requirements and any radiated feld/emi requirements. new designs for surface mount inductors are available from coiltronics, coilcraft, toko, sumida and vishay. c in and c out selection the input capacitor, c in , is needed to flter the trapezoidal current at the source of the top high side mosfet. to prevent large ripple voltage, a low esr input capacitor sized for the maximum rms current should be used. approximate rms current is given by: i rms = i out(max) ? v out v in ? v in v out ? 1 input voltage (v) 5 switching frequency (khz) 400 500 600 35 3642 f02 300 200 15 25 45 30 10 20 40 100 0 700 l = 47h l = 68h l = 100h l = 150h l = 220h l = 470h v out = 5v i set open input voltage (v) 5 0 switching frequency (khz) 50 150 200 250 500 350 15 25 30 3642 f03 100 400 450 300 10 20 35 40 45 l = 470h l = 220h l = 150h l = 100h l = 68h l = 47h v out = 3.3v i set open peak inductor current (ma) 100 inductor value (h) 1000 10000 10 100 3642 f04
ltc3642 12 3642fc applications information this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even signifcant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based only on 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. the output capacitor, c out , flters the inductors ripple current and stores energy to satisfy the load current when the ltc3642 is in sleep. the output ripple has a lower limit of v out /160 due to the 5mv typical hysteresis of the feed - back comparator. the time delay of the comparator adds an additional ripple voltage that is a function of the load current. during this delay time, the ltc3642 continues to switch and supply current to the output. the output ripple can be approximated by: v out i peak 2 ? i load ? ? ? ? ? ? 4 ? 10 ? 6 c out + v out 160 the output ripple is a maximum at no load and approaches lower limit of v out /160 at full load. choose the output capacitor c out to limit the output voltage ripple at mini - mum load current. the value of the output capacitor must be large enough to accept the energy stored in the inductor without a large change in output voltage. setting this voltage step equal to 1% of the output voltage, the output capacitor must be: c out > 50 ? l ? i peak v out ? ? ? ? ? ? 2 typically, a capacitor that satisfes the voltage ripple requirement is adequate to flter the inductor ripple. to avoid overheating, the output capacitor must also be sized to handle the ripple current generated by the inductor. the worst-case ripple current in the output capacitor is given by i rms = i peak /2. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special polymer, aluminum electrolytic, and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important only to use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have signifcantly higher esr but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long- term reliability. ceramic capacitors have excellent low esr characteristics but can have high voltage coeffcient and audible piezoelectric effects. the high quality factor (q) of ceramic capacitors in series with trace inductance can also lead to signifcant ringing. using ceramic input and output capacitors higher value, lower cost ceramic capacitors are now be- coming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the ltc3642. for applications with inductive source impedance, such as a long wire, a series rc network may be required in parallel with c in to dampen the ringing of the input supply. figure 5 shows this circuit and the typical values required to dampen the ringing. ltc3642 v in c in l in 3642 f05 4 ? c in r = l in c in figure 5. series rc to reduce v in ringing
ltc3642 13 3642fc applications information output voltage programming for the adjustable version, the output voltage is set by an external resistive divider according to the following equation: v out = 0.8v ? 1 + r1 r2 ? ? ? ? ? ? the resistive divider allows the v fb pin to sense a fraction of the output voltage as shown in figure 6. output voltage adjustment range is from 0.8v to v in . v fb ltc3642 gnd v out r2 r1 figure 6. setting the output voltage to minimize the no-load supply current, resistor values in the megohm range should be used; however, large resistor values should be used with caution. the feedback divider is the only load current when in shutdown. if pcb leak- age current to the output node or switch node exceeds the load current, the output voltage will be pulled up. in normal operation, this is generally a minor concern since the load current is much greater than the leakage. the increase in supply current due to the feedback resistors can be calculated from: ?i vin = v out r1 + r2 ? ? ? ? ? ? ? v out v in ? ? ? ? ? ? run pin with programmable hysteresis the ltc3642 has a low power shutdown mode controlled by the run pin. pulling the run pin below 0.7v puts the ltc3642 into a low quiescent current shutdown mode (i q ~ 3a). when the run pin is greater than 1.2v, the ltc3642 run 4.7m v in 3642 f07 ltc3642 run v supply figure 7. run pin interface to logic controller is enabled. figure 7 shows examples of con - fgurations for driving the run pin from logic. run ltc3642 hyst v in r2 r1 r3 3642 f08 figure 8. adjustable undervoltage lockout the run pin can alternatively be confgured as a precise undervoltage lockout (uvlo) on the v in supply with a resistive divider from v in to ground. the run pin com - parator nominally provides 10% hysteresis when used in this method; however, additional hysteresis may be added with the use of the hyst pin. the hyst pin is an open- drain output that is pulled to ground whenever the run comparator is not tripped. a simple resistive divider can be used as shown in figure 8 to meet specifc v in voltage requirements. specifc values for these uvlo thresholds can be computed from the following equations: rising ? v in ? uvlo ? threshold = 1.21v ? 1 + r1 r2 ? ? ? ? ? ? falling ? v in ? uvlo ? threshold = 1.10v ? 1 + r1 r2 + r3 ? ? ? ? ? ?
ltc3642 14 3642fc applications information the minimum value of these thresholds is limited to the internal v in uvlo thresholds that are shown in the electri - cal characteristics table. the current that fows through this divider will directly add to the shutdown, sleep and active current of the ltc3642, and care should be taken to minimize the impact of this current on the overall effciency of the application circuit. resistor values in the megohm range may be required to keep the impact on quiescent shutdown and sleep currents low. be aware that the hyst pin cannot be allowed to exceed its absolute maximum rating of 6v. to keep the voltage on the hyst pin from exceeding 6v, the following relation should be satisfed: v in(max) ? r3 r1 + r2 + r3 ? ? ? ? ? ? < 6v the run pin may also be directly tied to the v in supply for applications that do not require the programmable undervoltage lockout feature. in this confguration, switch - ing is enabled when v in surpasses the internal undervoltage lockout threshold. soft-start the internal 0.75ms soft-start is implemented by ramping both the effective reference voltage from 0v to 0.8v and the peak current limit set by the i set pin (25ma to 115ma). to increase the duration of the reference voltage soft-start, place a capacitor from the ss pin to ground. an internal 5a pull-up current will charge this capacitor, resulting in a soft-start ramp time given by: t ss = c ss ? 0.8v 5a when the ltc3642 detects a fault condition (input supply undervoltage or overvoltage) or when the run pin falls below 1.1v, the ss pin is quickly pulled to ground and the internal soft-start timer is reset. this ensures an orderly restart when using an external soft-start capacitor. the duration of the 1ms internal peak current soft-start may be increased by placing a capacitor from the i set pin to ground. the peak current soft-start will ramp from 25ma to the fnal peak current value determined by a resistor from i set to ground. a 1a current is sourced out of the i set pin. with only a capacitor connected between i set and ground, the peak current ramps linearly from 25ma to 115ma, and the peak current soft-start time can be expressed as: t ss(iset) = c iset ? 0.8v 1a a linear ramp of peak current appears as a quadratic waveform on the output voltage. for the case where the peak current is reduced by placing a resistor from i set to ground, the peak current offset ramps as a decaying exponential with a time constant of r iset ? c iset . for this case, the peak current soft-start time is approximately 3 ? r iset ? c iset . unlike the ss pin, the i set pin does not get pulled to ground during an abnormal event; however, if the i set pin is foating (programmed to 115ma peak current), the ss and i set pins may be tied together and connected to a capacitor to ground. for this special case, both the peak current and the reference voltage will soft-start on power - up and after fault conditions. the ramp time for this combination is c ss(iset) ? (0.8v/6a). effciency considerations the effciency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the effciency and which change would produce the most improvement. effciency can be expressed as: effciency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percent - age of input power. although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: v in operating current and i 2 r losses. the v in operating current dominates the effciency loss at very low load currents whereas the i 2 r loss dominates the effciency loss at medium to high load currents. 1. the v in operating current comprises two components: the dc supply current as given in the electrical charac - teristics and the internal mosfet gate charge currents.
ltc3642 15 3642fc applications information the gate charge current results from switching the gate capacitance of the internal power mosfet switches. each time the gate is switched from high to low to high again, a packet of charge, dq, moves from v in to ground. the resulting dq/dt is the current out of v in that is typically larger than the dc bias current. 2. i 2 r losses are calculated from the resistances of the internal switches, r sw , and external inductor r l . when switching, the average output current fowing through the inductor is chopped between the high side pmos switch and the low side nmos switch. thus, the series resistance looking back into the switch pin is a function of the top and bottom switch r ds(on) values and the duty cycle (dc = v out /v in ) as follows: r sw = (r ds(on)top )dc + (r ds(on)bot )(1 C dc) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance characteris - tics curves. thus, to obtain the i 2 r losses, simply add r sw to r l and multiply the result by the square of the average output current: i 2 r loss = i o 2 (r sw + r l ) other losses, including c in and c out esr dissipative losses and inductor core losses, generally account for less than 2% of the total power loss. thermal considerations the ltc3642 does not dissipate much heat due to its high effciency and low peak current level. even in worst-case conditions (high ambient temperature, maximum peak current and high duty cycle), the junction temperature will exceed ambient temperature by only a few degrees. design example as a design example, consider using the ltc3642 in an application with the following specifcations: v in = 24v, v out = 3.3v, i out = 50ma, f = 250khz. furthermore, as- sume for this example that switching should start when v in is greater than 12v and should stop when v in is less than 8v. first, calculate the inductor value that gives the required switching frequency: l = 3.3v 250khz ? 115ma ? ? ? ? 1? 3.3v 24v ? ? ? @ 100h next, verify that this value meets the l min requirement. for this input voltage and peak current, the minimum inductor value is: l min = 24v ? 100ns 115ma ? 22h therefore, the minimum inductor requirement is satisfed, and the 100h inductor value may be used. next, c in and c out are selected. for this design, c in should be size for a current rating of at least: i rms = 50ma ? 3.3v 24v ? 24v 3.3v C 1 ? 18ma rms due to the low peak current of the ltc3642, decoupling the v in supply with a 1f capacitor is adequate for most applications. c out will be selected based on the output voltage ripple requirement. for a 1.5% (50mv) output voltage ripple at no load, c out can be calculated from: c out = 115 ma ? 4 ? 10 ?6 2 50mv ? 3.3v 160 ? ? ? ? ? ? a 7.8f capacitor gives this typical output voltage ripple at no load. choose a 10f capacitor as a standard value. the output voltage can now be programmed by choosing the values of r1 and r2. choose r2 = 240k and calculate r1 as: r1 = v out 0.8v ? 1 ? ? ? ? ? ? ? r2 = 750k
ltc3642 16 3642fc applications information the undervoltage lockout requirement on v in can be satisfed with a resistive divider from v in to the run and hyst pins. choose r1 = 2m and calculate r2 and r3 as follows: r2 = 1.21v v in(rising) ? 1.21v ? ? ? ? ? ? ? ? ? r1 = 224k r3 = 1.1v v in(falling) ? 1.1v ? ? ? ? ? ? ? ? ? r1? r2 = 90.8k choose standard values for r2 = 226k and r3 = 91k. the i set pin should be left open in this example to select maxi - mum peak current (115ma). figure 9 shows a complete schematic for this design example. 3. keep the switching node, sw, away from all sensitive small signal nodes. the rapid transitions on the switching node can couple to high impedance nodes, in particular v fb , and create increased output ripple. 4. flood all unused area on all layers with copper. flooding with copper will reduce the temperature rise of power components. you can connect the copper areas to any dc net (v in , v out , gnd or any other dc rail in your system). v in ltc3642 run 2m 1f 226k 91k hyst 3642 f09 sw v in 24v v out 3.3v 50ma i set ss v fb gnd 750k 10f 100h 240k figure 9. 24v to 3.3v, 50ma regulator at 250khz figure 10. layout example v in ltc3642 run c in c ss r set i set 3642 f10a sw v in v out v fb ss hyst gnd l1 r1 r2 1 6 2 5 7 4 3 8, 9 c out l1 c out v out v in gnd 3642 f10b vias to ground plane vias to input supply (v in ) outline of local ground plane c in r1 r2 r set c ss pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc3642. check the following in your layout: 1. large switched currents fow in the power switches and input capacitor. the loop formed by these compo - nents should be as small as possible. a ground plane is recommended to minimize ground impedance. 2. connect the (+) terminal of the input capacitor, c in , as close as possible to the v in pin. this capacitor provides the ac current into the internal power mosfets.
ltc3642 17 3642fc typical applications figure 11. high effciency 5v regulator effciency vs load current v in ltc3642 run c in 4.7f hyst 3642 f11a sw v in 5v to 45v v out 5v v fb ss i set gnd l1 220h r1 4.2m r2 800k c in : tdk c5750x7r2a475mt c out : avx 1812d107mat l1: tdk slf7045t-221mr33-pf c out 100f c ss 47nf r set 3.3v, 50ma regulator with peak current soft-start, small size soft-start waveforms v in ltc3642 run c in 1f ss 3642 ta02a sw v in 4.5v to 24v v out 3.3v 50ma v fb hyst i set gnd l1 47h r1 294k r2 93.1k c in : tdk c3216x7r1e105kt c out : avx 08056d106kat2a l1: taiyo yuden cbc2518t470k c out 10f c ss 0.1f output voltage 1v/div inductor current 20ma/div 2ms/div 3642 ta03b load current (ma) 1 88 efficiency (%) 89 90 91 92 94 10 100 3642 f11b 93 v in = 10v r set = 750k i set open r set = 500k positive-to-negative converter maximum load current vs input voltage v in ltc3642 run c in 1f hyst 3642 ta04a sw v in 4.5v to 33v v out ?12v v fb ss i set gnd l1 100h r1 1m r2 71.5k c in : tdk c3225x7r1h105kt c out : murata grm32dr71c106ka01 l1: tyco/coev dq6530-101m c out 10f input voltage (v) 5 maximum load current (ma) 30 40 45 3642 ta04b 20 10 15 25 35 10 20 30 40 50 25 35 15 45 v out = ?3v v out = ?5v v out = ?12v
ltc3642 18 3642fc typical applications small size, limited peak current, 10ma regulator v in ltc3642 run c in 1f r3 470k r4 100k r5 33k i set 3642 ta05a sw v in 7v to 45v v out 5v 10ma v fb ss hyst gnd l1 470h r1 470k r2 88.7k c in : tdk c3225x7r1h105kt c out : avx 08056d106kat2a l1: murata lqh32cn471k23 c out 10f v in ltc3642 run c in 1f ss 3642 ta07a sw v in 15v to 45v v out 15v 10ma v fb hyst i set gnd l1 4700h r1 3m r2 169k c in : avx 18125c105kat2a c out : tdk c3216x7r1e475kt l1: coilcraft ds1608c-475 c out 4.7f load current (ma) 0.1 60 efficiency (%) 70 80 100 1 10 3642 ta07b 90 65 75 95 85 v in = 24v v in = 36v v in = 45v high effciency 15v, 10ma regulator effciency vs load current
ltc3642 19 3642fc package description 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ? 0.05 (dd8) dfn 0509 rev c 0.25 0.05 2.38 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 (2 sides) 2.10 0.05 0.50 bsc 0.70 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698 rev c)
ltc3642 20 3642fc package description msop (ms8e) 0910 rev i 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does not include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 8 1 bottom view of exposed pad option 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 1.68 (.066) 1.88 (.074) 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 1.68 0.102 (.066 .004) 1.88 0.102 (.074 .004) 0.889 0.127 (.035 .005) recommended solder pad layout 0.65 (.0256) bsc 0.42 0.038 (.0165 .0015) typ 0.1016 0.0508 (.004 .002) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.05 ref 0.29 ref ms8e package 8-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1662 rev i)
ltc3642 21 3642fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number b 6/10 text updates in description updates to absolute maximum ratings ltc3642ims8e-3.3e#pbf changed to ltc3642ims8e-3.3#pbf in order information updates to electrical characteristics updates to graphs g05, g06, g14, g16, g17 updated description for pins 8 and 9 in pin functions text updates in operation section text updates in applications information section figure 10 graphic added updated y-axis text on ta04b graphic asterisk and related text added to typical application related parts updated 1 2 2 3 4, 5 6 8,9 13 16 17 22 22 c 10/10 updated text in c in and c out selection section updated text in design example section 12 15 (revision history begins at rev b)
ltc3642 22 3642fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 1010 rev c ? printed in usa related parts typical application 5v, 50ma regulator for automotive applications v in ltc3642 run c in 1f ss 3642 ta06a sw v batt 12v v out * 5v 50ma v fb hyst i set gnd *v out = v batt for v batt < 5v l1 220h r1 470k r2 88.7k c in : tdk c3225x7r2a105m c out : kemet c1210c106k4rac l1: coiltronics dra73-221-r c out 10f part number description comments ltc3631/ltc3631-3.3/ ltc3631-5 45v, 100ma synchronous micropower step-down dc/dc converter v in : 4.5v to 45v (60v max ), v out(min) = 0.8v, i q = 12a, i sd = 3a, 3mm 3mm dfn8, ms8e ltc3632 50v, 20ma synchronous micropower step-down dc/dc converter v in : 4.5v to 50v (60v max ), v out(min) = 0.8v, i q = 12a, i sd = 3a, 3mm 3mm dfn8, ms8e ltc1474 18v, 250ma (i out ), high effciency step-down dc/dc converter v in : 3v to 18v, v out(min) = 1.2v, i q = 10a, i sd = 6a, msop8 lt1934/lt1934-1 36v, 250ma (i out ), micropower step-down dc/dc converter with burst mode operation v in : 3.2v to 34v, v out(min) = 1.25v, i q = 12a, i sd < 1a, thinsot ? package lt1939 25v, 2a, 2.5mhz high effciency dc/dc converter and ldo controller v in : 3.6v to 25v, v out(min) = 0.8v, i q = 2.5ma, i sd < 10a, 3mm 3mm dfn10 lt3437 60v, 400ma (i out ), micropower step-down dc/dc converter with burst mode operation v in : 3.3v to 60v, v out(min) = 1.25v, i q = 100a, i sd < 1a, 3mm 3mm dfn10, tssop16e lt3470 40v, 250ma (i out ), high effciency step-down dc/dc converter with burst mode operation v in : 4v to 40v, v out(min) = 1.2v, i q = 26a, i sd < 1a, 2mm 3mm dfn8, thinsot lt3685 36v with transient protection to 60v, 2a (i out ), 2.4mhz, high effciency step-down dc/dc converter v in : 3.6v to 38v, v out(min) = 0.78v, i q = 70a, i sd < 1a, 3mm 3mm dfn10, msop10e

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